Modern Microprocessors Martin Land Department of Computer Science Hadassah Academic College
	Contents   Computer Architecture Home Lecture Slides User Manuals Microprocessor Links Exercises Bulletin Board Course Syllabus Office Hours		Lecture Slides Course Overview 4 slides per page 1 slide per page Classic RISC - Alpha 4 slides per page 1 slide per page Next Generation RISC — PowerPC + ARM + PIC32 4 slides per page 1 slide per page Review of IA-32 4 slides per page 1 slide per page 486 4 slides per page 1 slide per page Pentium 4 slides per page 1 slide per page P6 - Pentium Pro, I, II 4 slides per page 1 slide per page   Loop Unrolling clarification 4 slides per page 1 slide per page Pentium 4 4 slides per page 1 slide per page Multiprocessor System Issues 4 slides per page 1 slide per page 64-bit IA-32 Systems 4 slides per page 1 slide per page Itanium 4 slides per page 1 slide per page Centrino 4 slides per page 1 slide per page Mainframe Platforms 4 slides per page 1 slide per page
			Bulletin Board 22 Nov 2009 Correction to Targil 3 (see corrected copy) Each instance of BNEZ R3, L1 ; if regs[R3] != 0 branch to L1 should be BEQZ R3, L1 ; if regs[R3] == 0 branch to L1 10 Jan 2010 Hint for Targil 8 — example of reduction #pragma omp parallel shared(a,b) private(i,sum) {     #pragma omp parallel for reduction(+:sum)     for (i=0; i < N; i++){     sum+ = a[i] * b[i];     } } Each thread has private copy of variable sum At end of parallel for construct     Private copies of sum combined by addition (+)     Result copied into master thread copy of sum
			Exercises Targil 1 Solution to Targil 1   Targil 2 Solution to Targil 2   Targil 3 Solution to Targil 3 Targil 4 Solution to Targil 4   Targil 5 Solution to Targil 5   Targil 6 Solution to Targil 6   Targil 7 Solution to Targil 7   Targil 8 Solution to Targil 8
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